41 search results - page 3 / 9 » A novel FPGA logic block for improved arithmetic performance |
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
DATE
2010
IEEE
14 years 24 days ago
2010
IEEE
— The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic archi...
FPGA
2006
ACM
13 years 11 months ago
2006
ACM
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
FPGA
2006
ACM
13 years 11 months ago
2006
ACM
Abstract--Field-programmable gate-array (FPGA) logic synthesis and technology mapping have been studied extensively over the past 15 years. However, progress within the last few ye...
ARITH
2003
IEEE
14 years 1 months ago
2003
IEEE
In this paper we investigate the implementation of basic arithmetic functions, such as addition and multiplication, in Single Electron Tunneling (SET) technology. First, we descri...