41 search results - page 4 / 9 » A novel FPGA logic block for improved arithmetic performance |
ISLPED
2010
ACM
13 years 8 months ago
2010
ACM
Booth encoding is believed to yield faster multiplier designs with higher energy consumption. 16x16-bit Booth and NonBooth multipliers are analyzed in energy and delay space under...
CHES
2008
Springer
13 years 9 months ago
2008
Springer
Elliptic Curve Cryptosystems (ECC) have gained increasing acceptance in practice due to their significantly smaller bit size of the operands compared to other public-key cryptosyst...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
Carbon Nanotube Field-Effect Transistors (CNFETs) are being extensively studied as possible successors to CMOS. Novel device structures have been fabricated and device simulators ...
FPL
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents a novel architecture for domain-specific FPGA devices. This architecture can be optimised for both speed and density by exploiting domain-specific informatio...
FPL
2009
Springer
14 years 10 days ago
2009
Springer
Fast carry chains featuring dedicated adder circuitry is a distinctive feature of modern FPGAs. The carry chains bypass the general routing network and are embedded in the logic b...