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ICCAD
2001
IEEE
111views Hardware» more  ICCAD 2001»
14 years 4 months ago
Congestion Aware Layout Driven Logic Synthesis
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...
Thomas Kutzschebauch, Leon Stok
FPL
1999
Springer
147views Hardware» more  FPL 1999»
13 years 12 months ago
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...
DAC
2003
ACM
14 years 8 months ago
A new enhanced constructive decomposition and mapping algorithm
Structuring and mapping of a Boolean function is an important problem in the design of complex integrated circuits. Libraryaware constructive decomposition offers a solution to th...
Alan Mishchenko, Xinning Wang, Timothy Kam
DAC
2008
ACM
14 years 8 months ago
Type-matching clock tree for zero skew clock gating
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
Chia-Ming Chang, Shih-Hsu Huang, Yuan-Kai Ho, Jia-...
GECCO
2010
Springer
191views Optimization» more  GECCO 2010»
13 years 7 months ago
Fitness importance for online evolution
To complement standard fitness functions, we propose "Fitness Importance" (FI) as a novel meta-heuristic for online learning systems. We define FI and show how it can be...
Philip Valencia, Raja Jurdak, Peter Lindsay