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» A novel high throughput reconfigurable FPGA architecture
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EH
1999
IEEE
169views Hardware» more  EH 1999»
14 years 1 months ago
GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices
GeneticFPGA is a Java-based tool for evolving digital circuits on Xilinx XC4000EXTM and XC4000XLTM devices. Unlike other FPGA architectures popular with Evolutionary Hardware rese...
Delon Levi, Steve Guccione
FCCM
2004
IEEE
144views VLSI» more  FCCM 2004»
14 years 15 days ago
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine
In this paper we present a novel use of an FPGA as a computing element for streaming based application. We investigate the virtualized execution of dynamic reconfigurable tasks. We...
Matthias Dyer, Marco Platzner, Lothar Thiele
DATE
2009
IEEE
89views Hardware» more  DATE 2009»
14 years 3 months ago
Exploiting clock skew scheduling for FPGA
- Clock skew scheduling (CSS) is an effective technique to optimize clock period of sequential designs. However, these techniques are not effective in the presence of certain desig...
Sungmin Bae, Prasanth Mangalagiri, Narayanan Vijay...
FPGA
2009
ACM
233views FPGA» more  FPGA 2009»
14 years 3 months ago
FPCNA: a field programmable carbon nanotube array
Carbon nanotubes (CNTs), with their unique electronic properties, are promising materials for building nanoscale circuits. In this paper, we present a new CNT-based FPGA architect...
Chen Dong, Scott Chilstedt, Deming Chen
ASPDAC
2007
ACM
156views Hardware» more  ASPDAC 2007»
14 years 23 days ago
Implementation of a Real Time Programmable Encoder for Low Density Parity Check Code on a Reconfigurable Instruction Cell Archit
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...
Zahid Khan, Tughrul Arslan