252 search results - page 5 / 51 » A novel high throughput reconfigurable FPGA architecture |
RSP
2008
IEEE
14 years 1 months ago
2008
IEEE
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
TVLSI
2010
13 years 2 months ago
2010
:- This paper describes the design and VLSI architecture for a 4x4 breadth first K-Best MIMO decoder using a 64 QAM scheme. A novel sort free approach to path extension, as well as...
ICRA
2007
IEEE
14 years 1 months ago
2007
IEEE
— For certain applications, field robotic systems require small size for cost, weight, access, stealth or other reasons. Small size results in constraints on critical resources s...
ANCS
2005
ACM
14 years 1 months ago
2005
ACM
IP address lookup is one of the most challenging problems of Internet routers. In this paper, an IP lookup rate of 263 Mlps (Million lookups per second) is achieved using a novel ...
FPGA
2004
ACM
13 years 11 months ago
2004
ACM
Pattern matching for network security and intrusion detection demands exceptionally high performance. Much work has been done in this field, and yet there is still significant roo...