27 search results - page 4 / 6 » A novel reconfigurable hardware architecture for IP address ... |
ARC
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient...
FCCM
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
DATE
2010
IEEE
14 years 16 days ago
2010
IEEE
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
FPGAs offer flexibility and cost-effectiveness that ASICs cannot match; however, their performance is quite poor in comparison, especially for arithmetic dominated circuits. To ad...
ANCS
2009
ACM
13 years 5 months ago
2009
ACM
As the Internet grows, both the number of rules in packet filtering databases and the number of prefixes in IP lookup tables inside the router are growing. The packet processing e...