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ISCAS
2006
IEEE
93views Hardware» more  ISCAS 2006»
14 years 29 days ago
A one-shot projection method for interconnects with process variations
—With the development of IC technology, it becomes urgent to investigate model reduction method for interconnects with process variations. In this paper, a one-shot projection al...
Jun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong ...
GLVLSI
2006
IEEE
101views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance
Process variations have become a serious concern for nanometer technologies. The interconnect and device variations include interand intra-die variations of geometries, as well as...
Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, ...
SLIP
2009
ACM
14 years 1 months ago
Closed-form solution for timing analysis of process variations on SWCNT interconnect
In this paper, a comprehensive and fast method is presented for the timing analysis of process variations on single-walled carbon nanotube (SWCNT) bundles. Unlike previous works t...
Peng Sun, Rong Luo
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Frequency Selective Model Order Reduction via Spectral Zero Projection
As process technology continues to scale into the nanoscale regime, interconnect plays an ever increasing role in determining VLSI system performance. As the complexity of these sy...
Mehboob Alam, Arthur Nieuwoudt, Yehia Massoud
ISQED
2003
IEEE
116views Hardware» more  ISQED 2003»
14 years 7 days ago
Analyzing Statistical Timing Behavior of Coupled Interconnects Using Quadratic Delay Change Characteristics
With continuing scaling of CMOS process, process variations in the form of die-to-die and within-die variations become significant which cause timing uncertainty. This paper prop...
Tom Chen, Amjad Hajjar