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» A parallel integer programming approach to global routing
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DAC
2009
ACM
14 years 8 months ago
O-Router:an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
IPPS
2007
IEEE
14 years 1 months ago
Optimizing Inter-Nest Data Locality Using Loop Splitting and Reordering
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...
Sofiane Naci
VLSID
2002
IEEE
160views VLSI» more  VLSID 2002»
14 years 7 months ago
An Efficient Hierarchical Timing-Driven Steiner Tree Algorithm for Global Routing
In this paper, we propose a hierarchical timing-driven Steiner tree algorithm for global routing which considers the minimization of timing delay during the tree construction as t...
Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun...
IPPS
2006
IEEE
14 years 1 months ago
An approach to locality-conscious load balancing and transparent memory hierarchy management with a global-address-space paralle
The development of efficient parallel out-of-core applications is often tedious, because of the need to explicitly manage the movement of data between files and data structures ...
Sriram Krishnamoorthy, Ümit V. Çataly&...
ICCD
2008
IEEE
124views Hardware» more  ICCD 2008»
14 years 4 months ago
Global bus route optimization with application to microarchitectural design exploration
— Circuit and processor designs will continue to increase in complexity for the foreseeable future. With these increasing sizes comes the use of wide buses to move large amounts ...
Dae Hyun Kim, Sung Kyu Lim