420 search results - page 22 / 84 » A pseudo-hierarchical methodology for high performance micro... |
ISVLSI
2002
IEEE
14 years 1 months ago
2002
IEEE
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
ASPDAC
2011
ACM
13 years 6 days ago
2011
ACM
- In low temperature polycrystalline silicon (LTPS) based display technologies, the electrical parameter variations in thin film transistors (TFTs) caused by random grain boundarie...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
DAC
1997
ACM
14 years 24 days ago
1997
ACM
Abstract - This paper describes the development of a concurrent methodology for standard cell library generation. Use of a novel physical design automation method enables a high de...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
The capability of performing architectural exploration has become essential for embedded microprocessor design in System-On-Chip. While many retargetable instruction set (ISA) sim...