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FCCM
2008
IEEE
160views VLSI» more  FCCM 2008»
14 years 3 months ago
Facilitating Processor-Based DPR Systems for non-DPR Experts
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...
Edward Chen, William A. Gruver, Dorian Sabaz, Lesl...
TVLSI
2008
187views more  TVLSI 2008»
13 years 9 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
UML
1999
Springer
14 years 1 months ago
Enabling the Refinement of a Software Architecture into a Design
Software architecture research has thus far mainly addressed formal specification and analysis of coarse-grained software models. The formality of architectural descriptions, their...
Marwan Abi-Antoun, Nenad Medvidovic
CRIWG
2007
13 years 10 months ago
Directions to Acknowledge Learners' Self-organization in CSCL Macro-scripts
Abstract. In this article we present a conceptual analysis of the notion of learners’ selforganization in CSCL macro-scripts. We highlight that taking into account selforganizati...
Pierre Tchounikine
DATE
2007
IEEE
145views Hardware» more  DATE 2007»
14 years 3 months ago
Using an innovative SoC-level FMEA methodology to design in compliance with IEC61508
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
Riccardo Mariani, Gabriele Boschi, Federico Colucc...