Sciweavers

41 search results - page 2 / 9
» A retargetable micro-architecture simulator
Sort
View
DAC
2003
ACM
16 years 6 months ago
A retargetable micro-architecture simulator
The capability of performing architectural exploration has become essential for embedded microprocessor design in System-On-Chip. While many retargetable instruction set (ISA) sim...
Wai Sum Mong, Jianwen Zhu
ECBS
2002
IEEE
81views Hardware» more  ECBS 2002»
15 years 10 months ago
Optimization of a Retargetable Functional Simulator for Embedded Processors
The objective of this research is to develop tools and methods for system-level optimization of embedded software that is executed on system-on-chip platforms. In particular, this...
Francesco Papariello, Gabriele Luculli
161
Voted
DATE
2003
IEEE
128views Hardware» more  DATE 2003»
15 years 10 months ago
Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation
Given the growth in application-specific processors, there is a strong need for a retargetable modeling framework that is capable of accurately capturing complex processor behavi...
Wei Qin, Sharad Malik
136
Voted
DATE
1999
IEEE
115views Hardware» more  DATE 1999»
15 years 9 months ago
EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability
We describe EXPRESSION, a language supporting architectural design space exploration for embedded Systems-onChip (SOC) and automatic generation of a retargetable compiler/simulato...
Ashok Halambi, Peter Grun, Vijay Ganesh, Asheesh K...
CODES
2006
IEEE
15 years 11 months ago
A multiprocessing approach to accelerate retargetable and portable dynamic-compiled instruction-set simulation
Traditionally, instruction-set simulators (ISS’s) are sequential programs running on individual processors. Besides the advances of simulation techniques, ISS’s have been main...
Wei Qin, Joseph D'Errico, Xinping Zhu