3 search results - page 1 / 1 » A robust self-resetting CMOS 32-bit parallel adder |
ISCAS
2002
IEEE
14 years 8 days ago
2002
IEEE
This paper presents new circuit configurationsfor a more robust and efficient form of self-resettingCMOS (SRCMOS). Prior structures for SRCMOS have very high performance but are...
ASAP
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper explores low-power reliable microarchitectures for addition. Power, speed, and reliability (both defect- and fault-tolerance) are important metrics of system design, sp...
ISQED
2005
IEEE
14 years 28 days ago
2005
IEEE
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...