1017 search results - page 84 / 204 » A routing algorithm for flip-chip design |
IPPS
2006
IEEE
14 years 3 months ago
2006
IEEE
In reconfigurable systems, reconfiguration latency is a very important factor impact the system performance. In this paper, a framework is proposed that integrates the temporal pa...
DAC
1996
ACM
14 years 1 months ago
1996
ACM
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
ASPDAC
2004
ACM
14 years 2 months ago
2004
ACM
—The routing environment for the new emerging mixed-signal System-on-Package (SOP) technology is more advanced than that of the conventional PCB or MCM technology – pins are lo...
SIMUTOOLS
2008
13 years 10 months ago
2008
In this paper we present DeSiNe, a modular flow-level network simulator. DeSiNe is aimed at performance analysis and benchmarking of Quality of Service routing algorithms and traf...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
The use of CMOS nanometer technologies at 65 nm and below will pose serious challenges on the design of mixed-signal integrated systems in the very near future. Rising design comp...