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» A section cache system designed for VLIW architectures
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ICS
2005
Tsinghua U.
14 years 1 months ago
The implications of working set analysis on supercomputing memory hierarchy design
Supercomputer architects strive to maximize the performance of scientific applications. Unfortunately, the large, unwieldy nature of most scientific applications has lead to the...
Richard C. Murphy, Arun Rodrigues, Peter M. Kogge,...
ICEBE
2009
IEEE
147views Business» more  ICEBE 2009»
14 years 2 months ago
The Design and Implementation of Service Reservations in Real-Time SOA
—Service-oriented architecture (SOA) provides the flexibility of dynamically composing business processes in enterprise computing. However, they must be enhanced to support real...
Mark Panahi, Weiran Nie, Kwei-Jay Lin
ATAL
2006
Springer
13 years 11 months ago
Agent interface enhancement: making multiagent graphical models accessible
Multiagent probabilistic reasoning with multiply sectioned Bayesian networks requires interfacing agent subnets (the modeling task) subject to a set of conditions. To specify the ...
Yang Xiang, Kun Zhang
ICCD
2003
IEEE
123views Hardware» more  ICCD 2003»
14 years 4 months ago
Simplifying SoC design with the Customizable Control Processor Platform
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
C. Ross Ogilvie, Richard Ray, Robert Devins, Mark ...
ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
14 years 3 days ago
Piranha: a scalable architecture based on single-chip multiprocessing
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
Luiz André Barroso, Kourosh Gharachorloo, R...