Sciweavers

41 search results - page 5 / 9
» A semi-persistent clustering technique for VLSI circuit plac...
Sort
View
GLVLSI
1998
IEEE
169views VLSI» more  GLVLSI 1998»
13 years 11 months ago
On the Characterization of Multi-Point Nets in Electronic Designs
Important layout properties of electronic designs include interconnection length values, clock speed, area requirements, and power dissipation. A reliable estimation of those prop...
Dirk Stroobandt, Fadi J. Kurdahi
VLSID
2005
IEEE
105views VLSI» more  VLSID 2005»
14 years 19 days ago
Placement and Routing for 3D-FPGAs Using Reinforcement Learning and Support Vector Machines
The primary advantage of using 3D-FPGA over 2D-FPGA is that the vertical stacking of active layers reduce the Manhattan distance between the components in 3D-FPGA than when placed...
R. Manimegalai, E. Siva Soumya, V. Muralidharan, B...
GLVLSI
2007
IEEE
106views VLSI» more  GLVLSI 2007»
14 years 1 months ago
Floorplan repair using dynamic whitespace management
We describe an efficient, top-down strategy for overlap removal and floorplan repair which repairs overlaps in floorplans produced by placement algorithms or rough floorplanni...
Kristofer Vorwerk, Andrew A. Kennings, Doris T. Ch...
ISPD
2005
ACM
174views Hardware» more  ISPD 2005»
14 years 19 days ago
Fast and accurate rectilinear steiner minimal tree algorithm for VLSI design
In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT)1 algorithm called FLUTE. The algorithm is an extension of the wirelength estimation appr...
Chris C. N. Chu, Yiu-Chung Wong
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
14 years 4 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku