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GECCO
2007
Springer
159views Optimization» more  GECCO 2007»
14 years 1 months ago
A systemic computation platform for the modelling and analysis of processes with natural characteristics
Computation in biology and in conventional computer architectures seem to share some features, yet many of their important characteristics are very different. To address this, [1]...
Erwan Le Martelot, Peter J. Bentley, R. Beau Lotto
DATE
2010
IEEE
161views Hardware» more  DATE 2010»
14 years 25 days ago
Aging-resilient design of pipelined architectures using novel detection and correction circuits
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...
Hamed F. Dadgour, Kaustav Banerjee
SAC
2006
ACM
14 years 1 months ago
Building the functional performance model of a processor
In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. Th...
Alexey L. Lastovetsky, Ravi Reddy, Robert Higgins
MSWIM
2006
ACM
14 years 1 months ago
Performance modeling of critical event management for ubiquitous computing applications
A generic theoretical framework for managing critical events in ubiquitous computing systems is presented. The main idea is to automatically respond to occurrences of critical eve...
Tridib Mukherjee, Krishna M. Venkatasubramanian, S...
ISQED
2006
IEEE
90views Hardware» more  ISQED 2006»
14 years 1 months ago
Transaction Level Error Susceptibility Model for Bus Based SoC Architectures
System on Chip architectures have traditionally relied upon bus based interconnect for their communication needs. However, increasing bus frequencies and the load on the bus calls...
Ing-Chao Lin, Suresh Srinivasan, Narayanan Vijaykr...