Sciweavers

27 search results - page 5 / 6
» A stochastic multi-objective algorithm for the design of hig...
Sort
View
VLSISP
2008
129views more  VLSISP 2008»
13 years 7 months ago
Architecture and Evaluation of an Asynchronous Array of Simple Processors
Abstract-- This paper presents the architecture of an Asynchronous Array of simple Processors (AsAP), and evaluates its key architectural features as well as its performance and en...
Zhiyi Yu, Michael J. Meeuwsen, Ryan W. Apperson, O...
DAC
2006
ACM
14 years 8 months ago
Statistical logic cell delay analysis using a current-based model
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
Hanif Fatemi, Shahin Nazarian, Massoud Pedram
IEEEIAS
2008
IEEE
14 years 2 months ago
Operator-Centric and Adaptive Intrusion Detection
: An intrusion detection system should support the operator of the system. Thus, in addition to producing alerts, it should allow for easy insertion of new detection algorithms. It...
Ulf Larson, Stefan Lindskog, Dennis K. Nilsson, Er...
HPCA
2009
IEEE
14 years 8 months ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
FPGA
2004
ACM
163views FPGA» more  FPGA 2004»
13 years 11 months ago
Time and area efficient pattern matching on FPGAs
Pattern matching for network security and intrusion detection demands exceptionally high performance. Much work has been done in this field, and yet there is still significant roo...
Zachary K. Baker, Viktor K. Prasanna