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ASYNC
2005
IEEE
132views Hardware» more  ASYNC 2005»
14 years 2 months ago
High Level Synthesis of Timed Asynchronous Circuits
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
Tomohiro Yoneda, Atsushi Matsumoto, Manabu Kato, C...
DATE
2009
IEEE
209views Hardware» more  DATE 2009»
14 years 3 months ago
A graph grammar based approach to automated multi-objective analog circuit design
— This paper introduces a graph grammar based approach to automated topology synthesis of analog circuits. A grammar is developed to generate circuits through production rules, t...
Angan Das, Ranga Vemuri
ICCAD
2006
IEEE
146views Hardware» more  ICCAD 2006»
14 years 2 months ago
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
Yu Zhou, Danil Sokolov, Alexandre Yakovlev
CORR
2008
Springer
142views Education» more  CORR 2008»
13 years 8 months ago
Declarative Combinatorics: Boolean Functions, Circuit Synthesis and BDDs in Haskell
We describe Haskell implementations of interesting combinatorial generation algorithms with focus on boolean functions and logic circuit representations. First, a complete exact c...
Paul Tarau
AC
2003
Springer
14 years 1 months ago
Synthesis of Asynchronous Hardware from Petri Nets
Abstract. As semiconductor technology strides towards billions of transistors on a single die, problems concerned with deep sub-micron process features and design productivity call...
Josep Carmona, Jordi Cortadella, Victor Khomenko, ...