1137 search results - page 110 / 228 » A study of slipstream processors |
ASPDAC
2004
ACM
15 years 9 months ago
2004
ACM
— We study the delays faced by instructions in the pipeline of a superscalar processor and its impact on power and performance. Instructions that are ready-on-dispatch (ROD) are ...
IPPS
2003
IEEE
15 years 9 months ago
2003
IEEE
We present solutions to statically load-balance scatter operations in parallel codes run on Grids. Our loadbalancing strategy is based on the modification of the data distributio...
105
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FPL
2003
Springer
15 years 9 months ago
2003
Springer
This paper introduces the notion of a software decelerator, to be used in logic-centric system architectures. Functions are offloaded from logic to a processor, accepting a speed ...
149
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INFOCOM
2002
IEEE
15 years 8 months ago
2002
IEEE
— This paper presents an architecture and algorithms for optimizing the performance of web services. For a given service, session-based admission control is combined with stage-w...
108
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IPPS
2002
IEEE
15 years 8 months ago
2002
IEEE
This paper investigates the design of parallel algorithmic strategies that address the efficient use of both, memory hierarchies within each processor and a multilevel clustered ...