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» A study of slipstream processors
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IISWC
2006
IEEE
14 years 1 months ago
Performance Characterization of SPEC CPU2006 Integer Benchmarks on x86-64 Architecture
— As x86-64 processors become the CPU of choice for the personal computer market, it becomes increasingly important to understand the performance we can expect by migrating appli...
Dong Ye, Joydeep Ray, Christophe Harle, David R. K...
IPPS
2006
IEEE
14 years 1 months ago
Quantifying and reducing the effects of wrong-path memory references in cache-coherent multiprocessor systems
High-performance multiprocessor systems built around out-of-order processors with aggressive branch predictors execute many memory references that turn out to be on a mispredicted...
Resit Sendag, Ayse Yilmazer, Joshua J. Yi, Augustu...
MICRO
2006
IEEE
144views Hardware» more  MICRO 2006»
14 years 1 months ago
Die Stacking (3D) Microarchitecture
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
Bryan Black, Murali Annavaram, Ned Brekelbaum, Joh...
CASES
2006
ACM
14 years 1 months ago
Reducing energy of virtual cache synonym lookup using bloom filters
Virtual caches are employed as L1 caches of both high performance and embedded processors to meet their short latency requirements. However, they also introduce the synonym proble...
Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer, Stua...
ISLPED
2006
ACM
117views Hardware» more  ISLPED 2006»
14 years 1 months ago
Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm)
As transistors continue to scale down into the nanometer regime, device leakage currents are becoming the dominant cause of power dissipation in nanometer caches, making it essent...
Samuel Rodríguez, Bruce L. Jacob