1137 search results - page 50 / 228 » A study of slipstream processors |
HPCA
2001
IEEE
14 years 8 months ago
2001
IEEE
The performance of out-of-order processors increases with the instruction window size. In conventional processors, the effective instruction window cannot be larger than the issue...
CCGRID
2003
IEEE
14 years 28 days ago
2003
IEEE
In systems consisting of multiple clusters of processors which are interconnected by relatively slow communication links and which employ space sharing for scheduling jobs, such a...
HPDC
2003
IEEE
14 years 28 days ago
2003
IEEE
In systems consisting of multiple clusters of processors which employ space sharing for scheduling jobs, such as our Distributed ASCI1 Supercomputer (DAS), coallocation, i.e., the...
SBACPAD
2003
IEEE
14 years 27 days ago
2003
IEEE
Trace reuse improves the performance of processors by skipping the execution of sequences of redundant instructions. However, many reusable traces do not have all of their inputs ...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
— This paper evaluates various instruction- and data-cache organizations in terms of performance, power, energy and area on a suitably selected biomedical benchmark suite. The be...