88 search results - page 10 / 18 » A succinct memory model for automated design debugging |
DAC
1998
ACM
14 years 7 months ago
1998
ACM
Successive, formal refinement is a new approach for specification of embedded systems using a general-purpose programming language. Systems are formally modeled as Abstractable Sy...
DAC
2002
ACM
14 years 7 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
ENTCS
2006
13 years 6 months ago
2006
Bounded Model Checking (BMC) searches for counterexamples to a property with a bounded length k. If no such counterexample is found, k is increased. This process terminates when ...
PROCEDIA
2010
13 years 1 months ago
2010
High performance computing with low cost machines becomes a reality with GPU. Unfortunately, high performances are achieved when the programmer exploits the architectural specific...
AOSD
2006
ACM
14 years 21 days ago
2006
ACM
When modifying or debugging a software system, among other tasks, developers must often understand and manipulate source code that crosscuts the system’s structure. These tasks ...