341 search results - page 48 / 69 » A time predictable Java processor |
PLDI
2004
ACM
14 years 3 months ago
2004
ACM
Instruction scheduling is a compiler optimization that can improve program speed, sometimes by 10% or more—but it can also be expensive. Furthermore, time spent optimizing is mo...
ISCA
2005
IEEE
14 years 3 months ago
2005
IEEE
Increased power densities (and resultant temperatures) and other effects of device scaling are predicted to cause significant lifetime reliability problems in the near future. In...
DAC
2004
ACM
14 years 10 months ago
2004
ACM
A five-fold increase in leakage current is predicted with each technology generation. While Dynamic Voltage Scaling (DVS) is known to reduce dynamic power consumption, it also cau...
VLSID
2005
IEEE
14 years 10 months ago
2005
IEEE
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
PPPJ
2009
ACM
14 years 4 months ago
2009
ACM
Dynamic compilers can optimize application code specifically for observed code behavior. Such behavior does not have to be stable across the entire program execution to be bene...