Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
Chong-liang Ooi, Seon Wook Kim, Il Park, Rudolf Ei...
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Given the increasing complexity of multi-processor systems-onchip, a wide range of parameters must be tuned to find the best trade-offs in terms of the selected system figures of ...
Giovanni Mariani, Aleksandar Brankovic, Gianluca P...
Predicting how well applications may run on modern systems is becoming increasingly challenging. It is no longer sufficient to look at number of floating point operations and commu...