211 search results - page 18 / 43 » A verification system for interval-based specification langu... |
FDL
2007
IEEE
14 years 2 months ago
2007
IEEE
SystemVerilog encapsulates both design description and verification properties in one language and provides a unified environment for engineers who have the formidable challenge o...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
CORR
2007
Springer
13 years 7 months ago
2007
Springer
This paper deals with a common verification methodology and environment for SystemC BCA and RTL models. The aim is to save effort by avoiding the same work done twice by different...
ENTCS
2008
13 years 7 months ago
2008
Thanks to recent advances, modern proof assistants now enable verification of realistic sequential programs. However, regarding the concurrency paradigm, previous work essentially...
SIGSOFT
2003
ACM
14 years 8 months ago
2003
ACM
This paper describes a compositional proof strategy for verifying properties of requirements specifications. The proof strategy, which may be applied using either a model checker ...