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» Abstraction and refinement techniques in automated design de...
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DAC
1999
ACM
14 years 9 months ago
Engineering Change: Methodology and Applications to Behavioral and System Synthesis
Due to the unavoidable need for system debugging, performance tuning, and adaptation to new standards, the engineering change (EC) methodology has emerged as one of the crucial co...
Darko Kirovski, Miodrag Potkonjak
DAC
2003
ACM
14 years 9 months ago
Using a formal specification and a model checker to monitor and direct simulation
We describe a technique for verifying that a hardware design correctly implements a protocol-level formal specification. Simulation steps are translated to protocol state transiti...
Serdar Tasiran, Yuan Yu, Brannon Batson
FMCAD
2007
Springer
14 years 12 days ago
Transaction Based Modeling and Verification of Hardware Protocols
Modeling hardware through atomic guard/action transitions with interleaving semantics is popular, owing to the conceptual clarity of modeling and verifying the high level behavior ...
Xiaofang Chen, Steven M. German, Ganesh Gopalakris...
TCAD
2010
121views more  TCAD 2010»
13 years 3 months ago
Translation Validation of High-Level Synthesis
The growing complexity of systems and their implementation into silicon encourages designers to look for model designs at higher levels of abstraction and then incrementally build ...
Sudipta Kundu, Sorin Lerner, Rajesh K. Gupta
LISP
2006
160views more  LISP 2006»
13 years 8 months ago
Formal compiler construction in a logical framework
The task of designing and implementing a compiler can be a difficult and error-prone process. In this paper, we present a new approach based on the igher-order abstract syntax and ...
Jason Hickey, Aleksey Nogin