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ASAP
2000
IEEE
141views Hardware» more  ASAP 2000»
14 years 2 months ago
Bit Permutation Instructions for Accelerating Software Cryptography
Permutation is widely used in cryptographic algorithms. However, it is not well-supported in existing instruction sets. In this paper, two instructions, PPERM3R and GRP, are propo...
Zhijie Shi, Ruby B. Lee
ASPDAC
2001
ACM
82views Hardware» more  ASPDAC 2001»
14 years 1 months ago
A virtual 3-D multipole accelerated extractor for VLSI parasitic interconnect capacitance
A virtual 3-D extractor of the single dielectric is presented in this paper. In the indirect boundary integral equations, the plane charge distribution on the surface of conductors...
Zhaozhi Yang, Zeyi Wang, Shuzhou Fang
SDM
2004
SIAM
207views Data Mining» more  SDM 2004»
13 years 11 months ago
BAMBOO: Accelerating Closed Itemset Mining by Deeply Pushing the Length-Decreasing Support Constraint
Previous study has shown that mining frequent patterns with length-decreasing support constraint is very helpful in removing some uninteresting patterns based on the observation t...
Jianyong Wang, George Karypis
FCCM
2007
IEEE
117views VLSI» more  FCCM 2007»
14 years 4 months ago
FPGA Acceleration of Gene Rearrangement Analysis
In this paper we present our work toward FPGA acceleration of phylogenetic reconstruction, a type of analysis that is commonly performed in the fields of systematic biology and co...
Jason D. Bakos
CODES
2005
IEEE
14 years 3 months ago
Novel architecture for loop acceleration: a case study
In this paper, we show a novel approach to accelerate loops by tightly coupling a coprocessor to an ASIP. Latency hiding is used to exploit the parallelism available in this archi...
Seng Lin Shee, Sri Parameswaran, Newton Cheung