24 search results - page 1 / 5 » Accelerating Retiming Under the Coupled-Edge Timing Model |
ISVLSI
2002
IEEE
14 years 3 months ago
2002
IEEE
Retiming has been shown to be a powerful technique for improving the performance of synchronous circuits. However, even though retiming algorithms of polynomial time complexity ha...
ICCAD
2001
IEEE
14 years 7 months ago
2001
IEEE
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
ASPDAC
2009
ACM
14 years 5 months ago
2009
ACM
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...
ISCAPDCS
2003
14 years 7 days ago
2003
Many computation-intensive iterative or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graph...
FAC
2000
13 years 10 months ago
2000
In this paper we present a method of describing microprocessors at different levels of temporal and data abstraction. We consider microprogrammed, pipelined and superscalar proces...