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» Accelerating SIFT on parallel architectures
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SIGMOD
2007
ACM
136views Database» more  SIGMOD 2007»
14 years 8 months ago
Progressive optimization in a shared-nothing parallel database
Commercial enterprise data warehouses are typically implemented on parallel databases due to the inherent scalability and performance limitation of a serial architecture. Queries ...
Wook-Shin Han, Jack Ng, Volker Markl, Holger Kache...
AIPR
2008
IEEE
13 years 10 months ago
Low-cost, high-speed computer vision using NVIDIA's CUDA architecture
In this paper, we introduce real time image processing techniques using modern programmable Graphic Processing Units (GPU). GPUs are SIMD (Single Instruction, Multiple Data) device...
Seung In Park, Sean P. Ponce, Jing Huang, Yong Cao...
MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
13 years 6 months ago
Improving SIMT Efficiency of Global Rendering Algorithms with Architectural Support for Dynamic Micro-Kernels
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...
Michael Steffen, Joseph Zambreno
ISCA
2010
IEEE
232views Hardware» more  ISCA 2010»
14 years 1 months ago
Data marshaling for multi-core architectures
Previous research has shown that Staged Execution (SE), i.e., dividing a program into segments and executing each segment at the core that has the data and/or functionality to bes...
M. Aater Suleman, Onur Mutlu, José A. Joao,...
DAC
2010
ACM
13 years 8 months ago
Parallel multigrid preconditioning on graphics processing units (GPUs) for robust power grid analysis
Leveraging the power of nowadays graphics processing units for robust power grid simulation remains a challenging task. Existing preconditioned iterative methods that require inco...
Zhuo Feng, Zhiyu Zeng