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» Accelerating SIFT on parallel architectures
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DAC
2004
ACM
13 years 11 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
ASAP
2007
IEEE
122views Hardware» more  ASAP 2007»
14 years 1 months ago
Parallelizing HMMER for Hardware Acceleration on FPGAs
Profile based Hidden Markov Model is a widely used tool in bioinformatics. While being very valuable to biologists, it is extremely compute intensive and suffers from prohibitive...
Steven Derrien, Patrice Quinton
BCB
2010
156views Bioinformatics» more  BCB 2010»
13 years 2 months ago
Accelerating HMMER on GPUs by implementing hybrid data and task parallelism
Many biologically motivated problems are expressed as dynamic programming recurrences and are difficult to parallelize due to the intrinsic data dependencies in their algorithms. ...
Narayan Ganesan, Roger D. Chamberlain, Jeremy Buhl...
IPPS
2009
IEEE
14 years 2 months ago
Early experiences on accelerating Dijkstra's algorithm using transactional memory
In this paper we use Dijkstra’s algorithm as a challenging, hard to parallelize paradigm to test the efficacy of several parallelization techniques in a multicore architecture....
Nikos Anastopoulos, Konstantinos Nikas, Georgios I...
IPPS
2008
IEEE
14 years 1 months ago
GPU acceleration of numerical weather prediction
Weather and climate prediction software has enjoyed the benefits of exponentially increasing processor power for almost 50 years. Even with the advent of large-scale parallelism ...
John Michalakes, Manish Vachharajani