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» Accuracy-Adaptive Simulation of Transaction Level Models
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DATE
2008
IEEE
103views Hardware» more  DATE 2008»
14 years 1 months ago
A Mutation Model for the SystemC TLM 2.0 Communication Interfaces
Mutation analysis is a widely-adopted strategy in software testing with two main purposes: measuring the quality of test suites, and identifying redundant code in programs. Simila...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli
ISCA
1993
IEEE
115views Hardware» more  ISCA 1993»
13 years 11 months ago
Parity Logging Overcoming the Small Write Problem in Redundant Disk Arrays
Parity encoded redundant disk arrays provide highly reliable, cost effective secondary storage with high performance for read accesses and large write accesses. Their performance ...
Daniel Stodolsky, Garth A. Gibson, Mark Holland
DSD
2009
IEEE
124views Hardware» more  DSD 2009»
14 years 1 months ago
Network-on-Chip Architecture Exploration Framework
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
Timo Schönwald, Jochen Zimmermann, Oliver Bri...
FDL
2007
IEEE
14 years 1 months ago
Mapping Actor-Oriented Models to TLM Architectures
Actor-oriented modeling approaches are convenient for implementing functional models of embedded systems. Architectural models for heterogeneous system-on-chip architectures, howe...
Jens Gladigau, Christian Haubelt, Bernhard Niemann...
ASAP
2005
IEEE
121views Hardware» more  ASAP 2005»
14 years 21 days ago
Using TLM for Exploring Bus-based SoC Communication Architectures
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
Sudeep Pasricha, Mohamed Ben-Romdhane