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ET
2006
120views more  ET 2006»
13 years 8 months ago
Automatic Test Pattern Generation for Resistive Bridging Faults
An ATPG for resistive bridging faults is proposed that combines the advantages of section-based generation and interval-based simulation. In contrast to the solutions introduced s...
Piet Engelke, Ilia Polian, Michel Renovell, Bernd ...
DAC
2000
ACM
14 years 27 days ago
Modeling and simulation of real defects using fuzzy logic
Real defects (e.g. stuck-at or bridging faults) in the VLSI circuits cause intermediate voltages and can not be modeled as ideal shorts. In this paper we first show that the trad...
Amir Attarha, Mehrdad Nourani, Caro Lucas
TCAD
1998
109views more  TCAD 1998»
13 years 8 months ago
Diagnosing realistic bridging faults with single stuck-at information
Successful failure analysis requires accurate fault diagnosis. This paper presents a method for diagnosing bridging faults that improves on previous methods. The new method uses s...
David B. Lavo, Brian Chess, Tracy Larrabee, F. Joe...
VTS
1996
IEEE
112views Hardware» more  VTS 1996»
14 years 20 days ago
Optimal voltage testing for physically-based faults
In this paper we investigate optimal voltage testing approaches for physically-based faults in CMOS circuits. We describe the general nature of the problem and then focus on two f...
Yuyun Liao, D. M. H. Walker
DFT
2003
IEEE
114views VLSI» more  DFT 2003»
14 years 1 months ago
CodSim -- A Combined Delay Fault Simulator
Delay faults are an increasingly important test challenge. Traditional delay fault models are incomplete in that they only model a subset of delay defect behaviors. To solve this ...
Wangqi Qiu, Xiang Lu, Zhuo Li, D. M. H. Walker, We...