130 search results - page 5 / 26 » Accurate and scalable reliability analysis of logic circuits |
DATE
2005
IEEE
14 years 20 days ago
2005
IEEE
In nanometer scaled CMOS devices significant increase in the subthreshold, the gate and the reverse biased junction band-toband-tunneling (BTBT) leakage, results in the large incr...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
Single-walled carbon nanotube (SWCNT) bundles have the potential to provide an attractive solution for the resistivity and electromigration problems faced by traditional copper int...
DATE
2009
IEEE
14 years 1 months ago
2009
IEEE
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
WFLP
2009
Springer
14 years 1 months ago
2009
Springer
A logic program strongly terminates if it terminates for any selection rule. Clearly, considering a particular selection rule—like Prolog’s leftmost selection rule—allows one...
ISPD
2003
ACM
14 years 9 days ago
2003
ACM
We propose a method to capture crosstalk-induced noisy waveform for crosstalk-aware static timing analysis. The effects of capacitive coupling noise on timing are conventionally m...