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DSD
2008
IEEE
85views Hardware» more  DSD 2008»
14 years 1 months ago
TASTE: Testability Analysis Engine and Opened Libraries for Digital Data Path
Testability is one of the most important factors that are considered during design cycle along with reliability, speed, power consumption, cost and other factors important for a c...
Josef Strnadel
ICCD
2006
IEEE
312views Hardware» more  ICCD 2006»
14 years 4 months ago
A Design Approach for Fine-grained Run-Time Power Gating using Locally Extracted Sleep Signals
— Leakage power dissipation becomes a dominant component in operation power in nanometer devices. This paper describes a design methodology to implement runtime power gating in a...
Kimiyoshi Usami, Naoaki Ohkubo
APCCAS
2006
IEEE
271views Hardware» more  APCCAS 2006»
14 years 1 months ago
Leakage Optimized DECAP Design for FPGAs
— On-chip decoupling capacitors (Decaps) are widely used to mitigate on-chip power supply noise. At and below 100nm on-chip decaps face leakage and area overhead problems associa...
Balaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, ...
IPPS
2006
IEEE
14 years 1 months ago
Multi-clock pipelined design of an IEEE 802.11a physical layer transmitter
Among different wireless LAN technologies 802.11a has recently become popular due to its high throughput, large system capacity, and relatively long range. In this paper, we prop...
Maryam Mizani, Daler N. Rakhmatov
DATE
2005
IEEE
118views Hardware» more  DATE 2005»
14 years 1 months ago
An Iterative Algorithm for Battery-Aware Task Scheduling on Portable Computing Platforms
In this work we consider battery powered portable systems which either have Field Programmable Gate Arrays (FPGA) or voltage and frequency scalable processors as their main proces...
Jawad Khan, Ranga Vemuri