180 search results - page 11 / 36 » Achieving Scalability in Parallel Tabled Logic Programs |
IMC
2004
ACM
14 years 29 days ago
2004
ACM
The capacity of today's network links, along with the heterogeneity of their traffic, is rapidly growing, more than the workstation’s processing power. This makes the task ...
DAC
2010
ACM
13 years 11 months ago
2010
ACM
We propose a parallel global routing algorithm that concurrently processes routing subproblems corresponding to rectangular subregions covering the chip area. The algorithm uses a...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—In this paper, we propose a scalable and transparent parallelization scheme using threads for multi-core processor. The performance achieved by our scheme is scalable to the num...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Multi-input addition is an important operation for many DSP and video processing applications. On FPGAs, multi-input addition has traditionally been implemented using trees of car...
ISCA
1999
IEEE
13 years 11 months ago
1999
IEEE
Modern compilers must expose sufficient amounts of Instruction-Level Parallelism (ILP) to achieve the promised performance increases of superscalar and VLIW processors. One of the...