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» Achieving efficient register allocation via parallelism
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TPDS
2008
101views more  TPDS 2008»
13 years 7 months ago
An Energy-Oriented Evaluation of Buffer Cache Algorithms Using Parallel I/O Workloads
Power consumption is an important issue for cluster supercomputers as it directly affects running cost and cooling requirements. This paper investigates the memory energy efficienc...
Jianhui Yue, Yifeng Zhu, Zhao Cai
IEEEPACT
2009
IEEE
14 years 2 months ago
Using Aggressor Thread Information to Improve Shared Cache Management for CMPs
—Shared cache allocation policies play an important role in determining CMP performance. The simplest policy, LRU, allocates cache implicitly as a consequence of its replacement ...
Wanli Liu, Donald Yeung
ICRA
1999
IEEE
142views Robotics» more  ICRA 1999»
14 years 1 days ago
Development of BEST Nano-robot Soccer Team
In this paper, we describe the development of our BEST nano-robot soccer team composed of 5 robots, a vision system, and communication modules. Each nano-robot is designed with an...
Sung Ho Kim, JongSuk Choi, Byung Kook Kim
HPCC
2009
Springer
14 years 11 days ago
A Quantitative Study of Memory System Interference in Chip Multiprocessor Architectures
—The potential for destructive interference between running processes is increased as Chip Multiprocessors (CMPs) share more on-chip resources. We believe that understanding the ...
Magnus Jahre, Marius Grannæs, Lasse Natvig
SAC
2009
ACM
14 years 2 months ago
DARAW: a new write buffer to improve parallel I/O energy-efficiency
In the past decades, parallel I/O systems have been used widely to support scientific and commercial applications. New data centers today employ huge quantities of I/O systems, wh...
Xiaojun Ruan, Adam Manzanares, Kiranmai Bellam, Xi...