108 search results - page 9 / 22 » Achieving efficient register allocation via parallelism |
VLSID
2001
IEEE
14 years 8 months ago
2001
IEEE
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
MICRO
1992
IEEE
13 years 11 months ago
1992
IEEE
Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops and executing them in parallel. Modulo scheduling i...
MSO
2003
13 years 9 months ago
2003
The use of sub-optimal digital systems can at times lead to high speed, efficient, costeffective structures that are sufficient to perform needed tasks. We describe here a system ...
ASAP
2000
IEEE
14 years 5 days ago
2000
IEEE
MicroSIMD architectures incorporating subword parallelism are very efficient for application-specific media processors as well as for fast multimedia information processing in gen...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...