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ASPDAC
2009
ACM
135views Hardware» more  ASPDAC 2009»
14 years 2 months ago
Analysis of communication delay bounds for network on chips
—In network-on-chip, computing worst-case delay bound for packet delivery is crucial for designing predictable systems but yet an intractable problem due to complicated resource ...
Yue Qian, Zhonghai Lu, Wenhua Dou
CCS
2009
ACM
14 years 2 months ago
A framework for quantitative security analysis of machine learning
We propose a framework for quantitative security analysis of machine learning methods. Key issus of this framework are a formal specification of the deployed learning model and a...
Pavel Laskov, Marius Kloft
BC
2008
72views more  BC 2008»
13 years 7 months ago
Spike-train spectra and network response functions for non-linear integrate-and-fire neurons
Reduced models have long been used as a tool for the analysis of the complex activity taking place in neurons and their coupled networks. Recent advanced in experimental and theore...
Magnus J. E. Richardson
DAC
2003
ACM
14 years 26 days ago
Performance trade-off analysis of analog circuits by normal-boundary intersection
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
Guido Stehr, Helmut E. Graeb, Kurt Antreich
NIPS
2003
13 years 9 months ago
A Summating, Exponentially-Decaying CMOS Synapse for Spiking Neural Systems
Synapses are a critical element of biologically-realistic, spike-based neural computation, serving the role of communication, computation, and modification. Many different circui...
Rock Z. Shi, Timothy K. Horiuchi