Asynchronous systems are being viewed as an increasingly viable alternative to purely synchronous systems. This paper gives an overview of the current state of the art in practica...
This paper presents results on processor specification from a specialized high-level finite state machine (FSM) language. The language is an extension and enhancement of earlier...
The paper deals with synthesis technique for designing circuits with cascade errors detection. The proposed technique is based on partitioning a scheme into a number of cascades f...
Ilya Levin, Vladimir Ostrovsky, Osnat Keren, Vladi...
State explosion is a fundamental problem in the analysis and synthesis of discrete event systems. Continuous Petri nets can be seen as a relaxation of discrete models. The expected...
This paper presents a system to evaluate the testability of an on-line testable circuit. The system operates at the RT-level, before the logic synthesis step, and allows for an ex...