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IPPS
1998
IEEE
14 years 9 days ago
Design, Implementation and Evaluation of Parallel Pipelined STAP on Parallel Computers
This paper presents performance results for the design and implementation of parallel pipelined Space-Time Adaptive Processing (STAP) algorithms on parallel computers. In particul...
Alok N. Choudhary, Wei-keng Liao, Donald Weiner, P...
VISUALIZATION
1998
IEEE
14 years 8 days ago
Isosurface extraction in time-varying fields using a temporal hierarchical index tree
Many high-performance isosurface extraction algorithms have been proposed in the past several years as a result of intensive research efforts. When applying these algorithms to la...
Han-Wei Shen
DL
1998
Springer
111views Digital Library» more  DL 1998»
14 years 8 days ago
Practical Application of Existing Hypermedia Standards and Tools
In order for multimedia presentations to be stored, accessed and played from a large library they should not be encoded as final form presentations, since these consume storage sp...
Lloyd Rutledge, Jacco van Ossenbruggen, Lynda Hard...
HICSS
1997
IEEE
120views Biometrics» more  HICSS 1997»
14 years 8 days ago
Building the 4 Processor SB-PRAM Prototype
The SB-PRAM is a massively parallel, uniform memory access (UMA) shared memory computer. The main ideas of the design are multithreading on instruction level, hashing of the addre...
Peter Bach, Michael Braun, Arno Formella, Jör...
DAC
1997
ACM
14 years 7 days ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...