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ICCAD
2008
IEEE
108views Hardware» more  ICCAD 2008»
14 years 5 months ago
FBT: filled buffer technique to reduce code size for VLIW processors
— VLIW processors provide higher performance and better efficiency etc. than RISC processors in specific domains like multimedia applications etc. A disadvantage is the bloated...
Talal Bonny, Jörg Henkel
DAC
2006
ACM
14 years 9 months ago
Programming models and HW-SW interfaces abstraction for multi-processor SoC
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...
Ahmed Amine Jerraya, Aimen Bouchhima, Fréd&...
BMCBI
2010
136views more  BMCBI 2010»
13 years 9 months ago
The IronChip evaluation package: a package of perl modules for robust analysis of custom microarrays
Background: Gene expression studies greatly contribute to our understanding of complex relationships in gene regulatory networks. However, the complexity of array design, producti...
Yevhen Vainshtein, Mayka Sanchez, Alvis Brazma, Ma...
IJON
2006
109views more  IJON 2006»
13 years 8 months ago
Integrating the improved CBP model with kernel SOM
In this paper, we first design a more generalized network model, Improved CBP, based on the same structure as Circular BackPropagation (CBP) proposed by Ridella et al. The novelty ...
Qun Dai, Songcan Chen
POPL
2005
ACM
14 years 9 months ago
Associated types with class
Haskell's type classes allow ad-hoc overloading, or typeindexing, of functions. A natural generalisation is to allow type-indexing of data types as well. It turns out that th...
Manuel M. T. Chakravarty, Gabriele Keller, Simon L...