Sciweavers

562 search results - page 16 / 113
» Address Code and Arithmetic Optimizations for Embedded Syste...
Sort
View
CODES
2002
IEEE
14 years 21 days ago
Locality-conscious process scheduling in embedded systems
In many embedded systems, existence of a data cache might influence the effectiveness of process scheduling policy significantly. Consequently, a scheduling policy that takes in...
Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu,...
CODES
2010
IEEE
13 years 4 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...
SAMOS
2009
Springer
14 years 8 days ago
CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey
The demands for high quality, real-time performance and multi-format video support in consumer multimedia products are ever increasing. In particular, the future multimedia systems...
Yahya Jan, Lech Józwiak
LCTRTS
2007
Springer
14 years 1 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
CASES
2003
ACM
14 years 29 days ago
Compiler optimization and ordering effects on VLIW code compression
Code size has always been an important issue for all embedded applications as well as larger systems. Code compression techniques have been devised as a way of battling bloated co...
Montserrat Ros, Peter Sutton