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» Address generation for memories containing multiple arrays
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DAC
2003
ACM
14 years 8 months ago
Compiler-generated communication for pipelined FPGA applications
In this paper, we describe a set of compiler analyses and an implementation that automatically map a sequential and un-annotated C program into a pipelined implementation, targete...
Heidi E. Ziegler, Mary W. Hall, Pedro C. Diniz
ASPLOS
1991
ACM
13 years 11 months ago
Code Generation for Streaming: An Access/Execute Mechanism
Access/execute architectures have several advantages over more traditional architectures. Because address generation and memory access are decoupled from operand use, memory laten...
Manuel E. Benitez, Jack W. Davidson
HPCC
2007
Springer
14 years 1 months ago
Optimizing Array Accesses in High Productivity Languages
One of the outcomes of DARPA’s HPCS program has been the creation of three new high productivity languages: Chapel, Fortress, and X10. While these languages have introduced impro...
Mackale Joyner, Zoran Budimlic, Vivek Sarkar
TEC
2008
165views more  TEC 2008»
13 years 7 months ago
Population-Based Incremental Learning With Associative Memory for Dynamic Environments
In recent years, interest in studying evolutionary algorithms (EAs) for dynamic optimization problems (DOPs) has grown due to its importance in real-world applications. Several app...
Shengxiang Yang, Xin Yao
HPCA
1998
IEEE
13 years 11 months ago
FPGA Based Custom Computing Machines for Irregular Problems
Over the past few years there has been increased interest in building custom computing machines (CCMs) as a way of achieving very high performance on specific problems. The advent...
David Abramson, Paul Logothetis, Adam Postula, Mar...