116 search results - page 9 / 24 » Address generation for memories containing multiple arrays |
IJHPCA
2010
13 years 6 months ago
2010
Sparse matrix operations achieve only small fractions of peak CPU speeds because of the use of specialized, indexbased matrix representations, which degrade cache utilization by i...
IJPP
2006
13 years 7 months ago
2006
Abstract. In order to address the problems faced in the wireless communications domain, picoChip has devised the picoArrayTM . The picoArrayTM is a tiled-processor architecture, co...
PLDI
2009
ACM
14 years 2 months ago
2009
ACM
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
ICMCS
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper addresses the problem of 3D sound representation without sound source localization and proposes a theory based on the ray-space representation of light rays, which is i...
PPOPP
2009
ACM
14 years 8 months ago
2009
ACM
We have developed a transaction-based approach to distributed shared memory(DSM) that supports object caching and generates path expression prefetches. A path expression specifies...