20 search results - page 1 / 4 » Addressing instruction fetch bottlenecks by using an instruc... |
LCTRTS
2007
Springer
14 years 5 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
IPPS
1996
IEEE
14 years 3 months ago
1996
IEEE
Multiple instruction issue processors place high demands on register file bandwidth. One solution to reduce this bottleneck is the use of multiple register files. Register allocat...
ASAP
2003
IEEE
14 years 4 months ago
2003
IEEE
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
APCSAC
2003
IEEE
14 years 4 months ago
2003
IEEE
This paper proposes an approach for reducing access count to register-files based on operand data reuse. The key idea is to compare source and destination operands of the current ...
HPCA
2011
IEEE
13 years 2 months ago
2011
IEEE
Composable multicore systems merge multiple independent cores for running sequential single-threaded workloads. The performance scalability of these systems, however, is limited d...