241 search results - page 12 / 49 » Advanced Loop Optimizations for Parallel Computers |
ICC
2007
IEEE
14 years 1 months ago
2007
IEEE
—A computationally efficient optimal discrete bit allocation algorithm is proposed for medium and high target bit rate discrete multitone (DMT) transmissions. Unlike conventional...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Stencil computations form the performance-critical core of many applications. Tiling and parallelization are two important optimizations to speed up stencil computations. Many til...
IPPS
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper presents results on a new approach to partitioning a modulo-scheduled loop for distributed execution on parallel clusters of functional units organized as a VLIW machin...
IPPS
1996
IEEE
13 years 11 months ago
1996
IEEE
Minimizing communications when mapping affine loop nests onto distributed memory parallel computers has already drawn a lot of attention. This paper focuses on the next step: as i...
IPPS
2002
IEEE
14 years 9 days ago
2002
IEEE
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...