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141
Voted
DAC
2007
ACM
16 years 4 months ago
Placement of 3D ICs with Thermal and Interlayer Via Considerations
Thermal problems and limitations on interlayer via densities are important design constraints on three-dimensional integrated circuits (3D ICs), and need to be considered during g...
Brent Goplen, Sachin S. Sapatnekar
DAC
2007
ACM
16 years 4 months ago
RISPP: Rotating Instruction Set Processing Platform
Adaptation in embedded processing is key in order to address efficiency. The concept of extensible embedded processors works well if a few a-priori known hot spots exist. However,...
Jörg Henkel, Lars Bauer, Muhammad Shafique, S...
103
Voted
DAC
2007
ACM
16 years 4 months ago
High Performance and Low Power Electronics on Flexible Substrate
We propose a design and optimization methodology for high performance and ultra low power digital applications on flexible substrate using Low Temperature Polycrystalline Silicon ...
Jing Li, Kunhyuk Kang, Aditya Bansal, Kaushik Roy
120
Voted
DAC
1999
ACM
16 years 4 months ago
Hypergraph Partitioning for VLSI CAD: Methodology for Heuristic Development, Experimentation and Reporting
We illustrate how technical contributions in the VLSI CAD partitioning literature can fail to provide one or more of: (i) reproducible results and descriptions, (ii) an enabling a...
Andrew E. Caldwell, Andrew B. Kahng, Andrew A. Ken...
118
Voted
DAC
2003
ACM
16 years 4 months ago
Test cost reduction for SOCs using virtual TAMs and lagrange multipliers
Recent advances in tester technology have led to automatic test equipment (ATE) that can operate at up to several hundred MHz. However, system-on-chip (SOC) scan chains typically ...
Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski,...