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» Aggregating processor free time for energy reduction
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HPCA
2002
IEEE
14 years 7 months ago
Power Issues Related to Branch Prediction
This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy ...
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Marco B...
EMSOFT
2008
Springer
13 years 9 months ago
Energy efficient streaming applications with guaranteed throughput on MPSoCs
In this paper we present a design space exploration flow to achieve energy efficiency for streaming applications on MPSoCs while meeting the specified throughput constraints. The ...
Jun Zhu, Ingo Sander, Axel Jantsch
ASAP
2003
IEEE
107views Hardware» more  ASAP 2003»
14 years 24 days ago
Energy Aware Register File Implementation through Instruction Predecode
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
José L. Ayala, Marisa Luisa López-Va...
DATE
2007
IEEE
157views Hardware» more  DATE 2007»
14 years 1 months ago
Energy evaluation of software implementations of block ciphers under memory constraints
Software implementations of modern block ciphers often require large lookup tables along with code size increasing optimizations like loop unrolling to reach peak performance on g...
Johann Großschädl, Stefan Tillich, Chri...
LISP
2008
104views more  LISP 2008»
13 years 7 months ago
Flattening tuples in an SSA intermediate representation
For functional programs, unboxing aggregate data structures such as tuples removes memory indirections and frees dead components of the decoupled structures. To explore the consequ...
Lukasz Ziarek, Stephen Weeks, Suresh Jagannathan