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» Aggregating processor free time for energy reduction
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CODES
2010
IEEE
13 years 5 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
DATE
2007
IEEE
141views Hardware» more  DATE 2007»
13 years 11 months ago
Energy-efficient real-time task scheduling with task rejection
In the past decade, energy-efficiency has been an important system design issue in both hardware and software managements. For mobile applications with critical missions, both ene...
Jian-Jia Chen, Tei-Wei Kuo, Chia-Lin Yang, Ku-Jei ...
ESTIMEDIA
2005
Springer
14 years 1 months ago
Scratchpad Sharing Strategies for Multiprocess Embedded Systems: A First Approach
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...
Manish Verma, Klaus Petzold, Lars Wehmeyer, Heiko ...
SAC
2009
ACM
14 years 2 months ago
On scheduling soft real-time tasks with lock-free synchronization for embedded devices
In this paper, we consider minimizing the system-level energy consumption through dynamic voltage scaling for embedded devices, while a) allowing concurrent access to shared objec...
Shouwen Lai, Binoy Ravindran, Hyeonjoong Cho
ICCAD
2010
IEEE
109views Hardware» more  ICCAD 2010»
13 years 5 months ago
Misleading energy and performance claims in sub/near threshold digital systems
Abstract-- Many of us in the field of ultra-low-Vdd processors experience difficulty in assessing the sub/near threshold circuit techniques proposed by earlier papers. This paper i...
Yu Pu, Xin Zhang, Jim Huang, Atsushi Muramatsu, Ma...