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» Aggregation operators and decision modeling
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VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
14 years 9 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
SIGMOD
2007
ACM
196views Database» more  SIGMOD 2007»
14 years 8 months ago
GPUQP: query co-processing using graphics processors
We present GPUQP, a relational query engine that employs both CPUs and GPUs (Graphics Processing Units) for in-memory query co-processing. GPUs are commodity processors traditiona...
Rui Fang, Bingsheng He, Mian Lu, Ke Yang, Naga K. ...
ICCD
2006
IEEE
312views Hardware» more  ICCD 2006»
14 years 5 months ago
A Design Approach for Fine-grained Run-Time Power Gating using Locally Extracted Sleep Signals
— Leakage power dissipation becomes a dominant component in operation power in nanometer devices. This paper describes a design methodology to implement runtime power gating in a...
Kimiyoshi Usami, Naoaki Ohkubo
ICCAD
2006
IEEE
169views Hardware» more  ICCAD 2006»
14 years 5 months ago
Microarchitecture parameter selection to optimize system performance under process variation
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
Xiaoyao Liang, David Brooks
INFOCOM
2009
IEEE
14 years 3 months ago
Network Bandwidth Allocation via Distributed Auctions with Time Reservations
—This paper studies the problem of allocating network capacity through periodic auctions. Motivated primarily by a service overlay architecture, we impose the following condition...
Pablo Belzarena, Andrés Ferragut, Fernando ...